 | Week 1
- List the 5 classical components (Input, Output, Control, Datapath,
Memory) of a computer and show their relationships graphically.
- Define instruction set architecture.
- Define throughput and response time.
- Define the relationship between CPU execution time, CPU clock
cycles, and Clock rate.
- Given the average CPI for instruction classes, determine which
implementation will execute faster.
- Given an instruction profile, calculate the average CPI for the
program.
- Explain the relationship between current, voltage, and resistance
(Ohms Law).
- Calculate the power dissipated in a resistor based on
voltage and current.
- Explain
the relationship between clock rate and dissipated power.
- Calculate the power consumed by a CPU based on voltage, capacitive
load, and clock frequency.
|
| Week 2
- Explain SPEC benchmarks (interpret graphs).
- Given Amdahl's Law, compute the overall performance improvement
possible when a given feature is improved.
- Define MIPS.
- Apply geometric vs. arithmetic mean to determine performance
metrics.
- Normalize performance metrics.
|
| Week 3
- Explain the difference between Harvard and von Neumann computer
architectures.
- Define instruction set.
- Define the concept of registers.
- Compute signal propagation metrics.
- Using MIPS instructions, initialize a register to a fixed value.
- Using MIPS instructions, demonstrate how to perform basic
mathematical operations.
- Explain register vs. immediate instructions.
- Explain and analyze how instructions are represented in memory.
- Explain the memory structure on MIPS.
- Define LSB and MSB.
- Explain how signed and unsigned integers are represented in memory.
- Compute two's complement representations of integer values.
- Convert between binary, decimal, and hexadecimal representations of
integer values.
|
| Week 4
- Write simple programs using MIPS instructions for
 | branching |
| looping |
| comparison |
| bit manipulation |
| memory read and write (load and store) |
| integer math operations |
Given a simple Java code fragment, write the equivalent MIPS
assembler instructions.
|
| Week 5/6
- Define procedure.
- Explain the MIPS calling convention for procedures (incl register
save/restore)
- Explain the relationship between caller and callee.
- Explain the purpose of the stack when invoking procedures.
- Explain the behavior of MIPS addition/subtraction and differences in
behavior between e.g. add, addu
- Explain the limits of MIPS multiplication
- Explain the differences between mul and mult/multu
- Explain the limits of MIPS division
|
| Week 7
- Define "floating-point".
- Define the terms "fraction" and "exponent".
- Convert a floating-point value from binary (base-2) to decimal
(base-10) format.
- Convert a floating-point value from decimal to binary format.
- Express a floating-point value using normalized scientific notation.
- Encode a binary floating-point value in the IEEE Floating Point
Standard representation.
- Given an IEEE Floating Point Standard representation, state the
equivalent decimal or binary value.
- Describe/perform the addition or multiplication of normalized binary
values.
- Understand how to use the MIPS floating-point instructions and
interpret the resulting register values.
- Define datapath and explain the various elements of the MIPS
datapath.
- Compare and contrast combinational vs. state elements of a datapath.
- Explain the purpose of the Program Counter and the PC register.
- Define "branch target address".
- Define "edge-triggered clocking".
- Define "pipelining".
- Compute the speedup achieved by pipelining a given sequence of
operations.
- Explain how pipelining improves processor performance.
- Define "structural hazard", "data hazard", and "control hazard".
- Explain a "stall" and its causes.
- Explain the concept of forwarding/bypassing.
|
| Week 8
- Define "branch prediction".
- Explain dynamic branch prediction, and the distinction between 1-bit
and 2-bit prediction.
- Explain static branch prediction.
- Explain delayed branching.
- Explain how a compiler can improve "control hazard" stalls
associated with branch delays.
- Define "temporal locality" and "spatial locality"
- Define "caching" and explain its purpose.
- Define "hit rate" and "miss rate"
- Explain how a direct-mapped cache determines the location of a
memory element within the cache.
|
| Week 9/10
- Given a memory address and cache size information, perform the
calculations to convert an address to a cache index and tag.
- Explain the relationship between miss rate and block size in a cache.
- Compare and contrast write through and write back caching schemes.
- Perform cache related calculations to analyze the impact of having a cache on a
computer system.
- Define
"set associative cache" and "fully associative cache".
- Compare
and contrast the performance of set associative caches, direct mapped caches,
and fully associative caches.
- Explain the concept of the LRU replacement scheme.
- Explain the three C model for cache.
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