/*
 * timerA_input_capture_example2.c
 *
 *  Created on: 10/9/18
 *      Author: johnsontimoj
 */
//////////////////////////////////////
//
//  Timer A2 setup to create a PWM on pin 36
//  Timer A0 setup to capture on pin 40
//  Create an array with count values
//
////////////////////////////////////
//
//  Pin 36 is P6.6
//  P6.6 is TimerA_2, Input 3
//  Pin 40 is P2.7
//  P2.7 is TimerA_0, Input 4
//
//  Use SMCLK for PWM clock
//      SMCLK defaults to HSMCLK which defaults to HFXTCLK
//      all with a default of divide by 1
//          --> SMCLK = 3MHz
//
//      with divide by 8 on the Timer A 2
//          12.5Hz --> 30000 counts
//          xx% duty cycle --> 30000*xx/100 counts high, 3000*(100-xx)/100 counts low
//
//  Timer A 0
//      To get 4us resolution need 3MHz/12
//          /12 --> /4/3
//
//  Expect period of 80ms <=> 20000 counts
//  Interrupting on both edges => 10000 counts / interrupt
//
///////////////////////////////////
#include "msp.h"
#include <stdio.h>

void setup_timer_ic(void);
void setup_timer_pwm(int duty);

//  Global variables for ISR
uint16_t data[2][256];
uint8_t cnt = 0;

int main(){
    uint8_t i;

    setup_timer_pwm(50);
    setup_timer_ic();
    _enable_interrupts();

    // capture data
    __delay_cycles(3000000);

    // print results
    for(i=0; i<=255; i++)
        printf("%hu %i\n", data[1][i]-data[1][i-1], data[0][i]);

    return 0;
} // end main

void TA0_N_IRQHandler(void){
    if(TIMER_A0->IV == 8){
        data[1][cnt] = TIMER_A0->CCR[4];
        data[0][cnt] = (TIMER_A0->CCTL[4] & 0x08) && 0x01;
        cnt++;
    }
} // end TA0_N_IRQHandler

void setup_timer_ic(void){
    //
    // setup pins
    //
    // P2.7 in PSEL=01 mode and set as input
    P2->SEL0 |= 0x80;
    P2->SEL1 &= ~0x80;
    P2->DIR &= ~0x80;

    //
    // TIMER_A0
    // CTL
    //        SMCLK   /4   cont    noclr  no int
    // xxxx xx 10     10    10  x   0       0     x
    TIMER_A0->CTL = 0x02A0;

    //
    // EX0
    // xxxx xxxx xxxx x  /3
    // xxxx xxxx xxxx x  010
    TIMER_A0->EX0 = 0x0002;

    //
    // CCTL[4]
    // both  CCIxA  sync  x  x  cap  xxx  int  x  x  x  x
    //  11    00      1   0  0   1   000   1     0  0  0  0
    TIMER_A0->CCTL[4] = 0xC910;

    // setup NVIC
    //
    // Enable Timer A0
    // Note: Timer A0 is INTISR(9) for channel N
    NVIC->IP[9] |= 0x40; // Set a priority
    NVIC->ISER[0] |= 0x00000200; // ISER1 starts at 32

    return;
 } // end setup_timer_ic

void setup_timer_pwm(int duty){
    ///////////////////////////////////////////////////////////////////
    // duty is the percentage for duty cycle e.g. 25 --> 25% duty cycle
    ///////////////////////////////////////////////////////////////////
    //
    // setup pins
    //
    // P6.6 in PSEL=01 mode and set as output
    P6->SEL0 |= 0x40;
    P6->SEL1 &= ~0x40;
    P6->DIR |= 0x40;

    //
    // TIMER_A2
    // CTL
    //        SMCLK   /8   up    noclr  no int
    // xxxx xx 10     11   01  x   0      0     x
    TIMER_A2->CTL = 0x02D0;
    //
    // CCR[0] - 1KHz
    TIMER_A2->CCR[0] = 30000;
    //
    // CCR[3]
    TIMER_A2->CCR[3] = 30000*(duty)/100;    // integer divide!!!
    //
    // CCTL[3]
    // no cap  xx  x  x  x  comp  r-s  no int  x  x  x  x
    //   00                  0    111    0
    TIMER_A2->CCTL[3] = 0x00E0;

    return;
 } // end setup_timer_pwm