/*
 * timerA_pwm_example.c
 *
 *  Created on: 10/9/18
 *      Author: johnsontimoj
 */
//////////////////////////////////////
//
//  Timer A setup to generate a xx% duty cycle
//  1KHz square wave on Pin 36 via PWM
//
////////////////////////////////////
//
//  Pin 36 is P6.6
//  P6.6 is TimerA_2, Output 3
//
//  Use SMCLK for timer clock
//      SMCLK defaults to HSMCLK which defaults to HFXTCLK
//      all with a default of divide by 1
//          --> SMCLK = 3MHz
//      with no divide on the Timer
//          1KHz --> 3000 counts
//          xx% duty cycle --> 3000*xx/100 counts high, 3000*(100-xx)/100 counts low
//
//  Note - not concerned about the first cycle so not resetting the counter
//
///////////////////////////////////
#include "msp.h"
#include <stdio.h>

void setup_timer(int duty);

int main(){
    setup_timer(30);

    while(1){
        ; // do nothing
    } // end while

    return 0;
} // end main

void setup_timer(int duty){
    ///////////////////////////////////////////////////////////////////
    // duty is the percentage for duty cycle e.g. 25 --> 25% duty cycle
    ///////////////////////////////////////////////////////////////////
    //
    // setup pins
    //
    // P6.6 in PSEL=01 mode and set as output
    P6->SEL0 |= 0x40;
    P6->SEL1 &= ~0x40;
    P6->DIR |= 0x40;

    //
    // TIMER_A2
    // CTL
    //        SMCLK   /1   up    noclr  no int
    // xxxx xx 10     00   01  x   0      0     x
    TIMER_A2->CTL = 0x0210;
    //
    // CCR[0] - 1KHz
    TIMER_A2->CCR[0] = 3000;
    //
    // CCR[3]
    TIMER_A2->CCR[3] = 3000*(duty)/100;    // integer divide!!!
    //
    // CCTL[3]
    // no cap  xx  x  x  x  comp  r-s  no int  x  x  x  x
    //   00                  0    111    0
    TIMER_A2->CCTL[3] = 0x00E0;

    return;
 } // end setup_timer