CE1900 LECTURE PLAN

TEXTBOOK

Hwang, E. O., Digital Logic and Microprocessor Design with VHDL, Nelson: Thompson Learning, Toronto, Canada, 2006, ISBN: 0-534-46593-5

WEEKLY SCHEDULE

Click on the week numbers to get learning objectives to help you study the material.

WEEK MAJOR TOPIC TEXTBOOK READING

1 Binary Numbers C1-C2.1

2 Logic Gates and Canonical Equations C2.2-C2.10

3 Combinational Circuit Analysis and Design C3

4 Combinational Circuit Analysis and Design C3

5 Adders and Subtracters C4-C4.5

6 Adders and Subtracters C4-C4.5

7 ALU Design C4.6

8 Decoders and encoders C4.7-C4.8

9 Multiplexers, three-state buffers, comparators C4.9-C4.11

10 Shifters and multipliers C4.12-C4.13

11 FINAL EXAM

WEEK	MAJOR TOPIC	TEXTBOOK READING
1	Binary Numbers	C1-C2.1
2	Logic Gates and Canonical Equations	C2.2-C2.10
3	Combinational Circuit Analysis and Design	C3
4	Combinational Circuit Analysis and Design	C3
5	Adders and Subtracters	C4-C4.5
6	Adders and Subtracters	C4-C4.5
7	ALU Design	C4.6
8	Decoders and encoders	C4.7-C4.8
9	Multiplexers, three-state buffers, comparators	C4.9-C4.11
10	Shifters and multipliers	C4.12-C4.13
11	FINAL EXAM