WEEK 8 LEARNING OBJECTIVES
Day 1
- Define programmable logic array (PLA).
- Describe the general structure of a PLA.
- Implement canonical equations using a PLA.
- Reverse-engineer a given PLA to determine
the canonical equation and the truth table.
Day 2
- Define field programmable gate array (FPGA).
- Describe the general structure of an FPGA.
- Define logic element (LE).
- Define input-output element (IOE).
- Draw the basic structure of an FPGA.
Do not expand the LE to an internal circuit.
- Define look-up table (LUT).
- Describe how a multiplexer is used to
choose one of the FPGA LUT inputs.
Day 3
- This day is reserved for addional practice and discussion.