-- ******************************************************************
-- * project:	   irom
-- * filename:	   irom.vhd
-- * author:	   << insert your name here >> 
-- * date:	      MSOE Spring Quarter 2020
-- * provides:	   an instruction ROM for the CE1921 processor
-- ******************************************************************

-- use library packages
--  std_logic_1164: 9-valued logic signal voltages 
library ieee;
use ieee.std_logic_1164.all;


-- function block symbol
-- inputs: 
--    ADDR  : 32-bit address requesting instruction 
-- outputs: 
--    Q     : 32-bit output of machine code instruction 
-- notes    : ROMs do not reset on power-up so no reset signal 
--          : ROMs do not load in user mode so no load signal  
entity IROM is 
port(ADDR  : in std_logic_vector(31 downto 0);
     Q     : out std_logic_vector(31 downto 0));
end entity IROM;

-- circuit description 
architecture MULTIPLEXER of IROM is 
begin

  -- use address to output correct binary machine code number 
  with ADDR select 
  Q <= X"E3A0_800A" when X"0000_0000",    -- mov r8,#10
       X"E3A0_9000" when X"0000_0004",    -- mov r9,#0
       << complete remaining machine code numbers >> -- also hand disassemble and include
                                                     -- the assembly instruction as shown 
       X"EAFF_FFFD" when others;          -- b 0x00000040
       
end architecture MULTIPLEXER;