Day 1

• Review the classic architectural memory hierarchy (register, cache, main, electronic disk, magnetic disk, etc). Specifically focus on size, speed, and cost.
• Compare and contrast SRAM and DRAM in terms of access speed, number of transistors per bit, size, and price/GB.
• Define temporal locality.
• Define spatial locality.
• List examples of programming constructs that suggest temporal or spatial locality.
• Explain the statement: "memory hierarchies exist to exploit temporal and spatial locality."
• Define cache.
• State the age of cache memories as a computing technology. In other words, is cache a "new idea" or one with deep historical roots?
• Describe the classic split of cache memory into levels called L1, L2, and L3. Note the traditional locations (on-chip, motherboard) and the more modern locations.
• Describe the cache levels of your laptop computer.

Day 2

• Define block in the context of cache memory.
• Define cache hit.
• Define cache miss.
• Define hit rate.
• Define miss rate.
• Define hit time.
• Define miss penalty.
• Justify the statement "cache memory designers attempt to maximize hit rate and minimize miss penalty by adjusting block size and cache replacement strategies."
• Define direct mapped cache.
• Describe the classic direct mapped cache mapping equation.
• State the structure of direct mapped cache storage when the blocksize is a power-of-2.
• Justify the use of a validity bit in the structure of a direct mapped cache.
• State the purpose of the tag bits in the structure of a direct mapped cache.
• Diagram the cache contents as memory addresses are presented during read and write operations.
• Suggest the hardware that would be designed to determine if a memory read or write hits the cache. Use a schematic blueprint, pseudocode, or a flowchart.

Day 3

• Calculate the total number of bits in a direct mapped cache given the size of the memory addresses, blocksize, and either total number of blocks or cache size.
• Calculate the block address of any memory byte address presented to a cache if the cache size and blocksize are known.
• Explain the statement "exploit spatial locality by increasing blocksize."
• Summarize the miss rate trend versus blocksize.
• State the disadvantages of large blocksize.
• Describe the early-restart and requested-word-first techniques for reducing miss penalty with larger blocksize.