WEEK 3 LEARNING OBJECTIVES

Day 1

• Draw a voltage transfer characteristic (VTC).
• Identify the five VTC points: VOH, VIL, VM, VIH, VOL.
• Draw the NMOS I-V curve.
• Identify the saturated and non-saturated regions on the NMOS I-V curve.
• Write the Level 1 equations for NMOS current in saturation and non-saturation.
• Derive the design equation R*(W/L) to set the VOL value for an RTL inverter.
• Design RTL inverters to meet VOL specifications.
• Draw the static-CMOS inverter.
• State the VTC point that is typically the design rule equation in static-CMOS
• Derive the basic design equation for VM using transistor current balances.
• Design static-CMOS inverters to meet a switching threshold specification.
• Analyze a given static-CMOS inverter for VTC and transient behavior.
• Write SPICE input decks to simulate static-CMOS inverter VTC characteristics.

Day 2

• Describe the power flow in a CMOS inverter.
• Compare and contrast power flow in RTL and CMOS inverters.
• Justify the statement "Zero static power led CMOS to dominate in the semiconductor industry."
• Examine the effects of power-supply scaling on the CMOS inverter VTC characteristic.
• List the advantages and disadvantages of static-CMOS.