WEEK 4 LEARNING OBJECTIVES
Day 1
- Define delay-time parameters TPHL and TPLH.
- Define the average propagation delay TP.
- Define the 10-90 rise-time and 90-10 fall-time.
- Draw timing diagrams that illustrate TPHL,
TPLH, rise-time, and fall-time on non-ideal squarewaves.
- Draw the CMOS equivalent circuit used in
dynamic timing analysis.
- Derive the CMOS dynamic timing equations.
- Design CMOS inverters to meet dynamic timing
specifications.
Day 2
- Describe dynamic CMOS power dissipation.
- Derive the equations of power for CMOS
inverter switching.
- Calculate dyamic power for a given CMOS
inverter.
- Define the power-delay product (PDP).
- Calculate the PDP for a given CMOS inverter
and process technology.
- Compare and contrast the
power-delay product and the energy-delay product as CMOS
performance measures.