6 State Counter/Controller Sample

Title     6 State Counter/Controller Sample
Author    Charles S. Tritt, Ph.D.
Company   MSOE
Date      02-03-1994

; This six state counter counts by 1's, 2's or 3's.  It has an enable
; line that must be high for counting to occur.  Bringing the enable low
; forces the machine to state one (S1).  If two or more of the "BY"
: inputs are high simultaneously the machine resets to S1.

CHIP  my_6_state  iPLD22V10

; pin assignments

PIN    CLK ; clock pin
PIN    ENA ; counter enable
PIN   BY1S ; count by 1's
PIN   BY2S ; count by 2's
PIN   BY3S ; count by 3's

PIN     Q1 ; LSB
PIN     Q2
PIN     Q3 ; MSB
PIN  O1OR2 ; In states 1 or 2
PIN  O2345 ; In states 2, 3, 4 or 5
PIN  O5OR6 ; In states 5 or 6

; Use Moore Machine design

STATE
MOORE_MACHINE

; Default_output must precede Default_branch

DEFAULT_OUTPUT /O1OR2 /O2345 /O5OR6 ; For states 0 and 7
DEFAULT_BRANCH S1 ; Occurs if 2 or more of the "BY" input are high

; State assignments

S0 = /Q3 * /Q2 * /Q1  ; Unused, but specify so machine won't get stuck
S1 = /Q3 * /Q2 *  Q1
S2 = /Q3 *  Q2 * /Q1
S3 = /Q3 *  Q2 *  Q1
S4 =  Q3 * /Q2 * /Q1
S5 =  Q3 * /Q2 *  Q1
S6 =  Q3 *  Q2 * /Q1
S7 =  Q3 *  Q2 *  Q1  ; Unused, but specify so machine won't get stuck

; State transitions

S0 := VCC    -> S1  ; If in S0, go directly to S1
S1 := /ONES   -> S2
    + TWOS   -> S3
    + THREES -> S4
S2 := /ONES   -> S3
    + TWOS   -> S4
    + THREES -> S5
S3 := /ONES   -> S4
    + TWOS   -> S5
    + THREES -> S6
S4 := /ONES   -> S5
    + TWOS   -> S6
    + THREES -> S1
S5 := /ONES   -> S6
    + TWOS   -> S1
    + THREES -> S2
S6 := /ONES   -> S1
    + TWOS   -> S2
    + THREES -> S3
S7 := VCC    -> S6  ; If in S7, go directly to S6

; Outputs

S1.OUTF =  O1OR2  * /O2345  * /O5OR6
S2.OUTF =  O1OR2  *  O2345  * /O5OR6
S3.OUTF = /O1OR2  *  O2345  * /O5OR6
S4.OUTF = /O1OR2  *  O2345  * /O5OR6
S5.OUTF = /O1OR2  *  O2345  *  O5OR6
S6.OUTF = /O1OR2  * /O2345  *  O5OR6

CONDITIONS

ONES   = ENA *  BY1S * /BY2S * /BY3S
TWOS   = ENA * /BY1S *  BY2S * /BY3S
THREES = ENA * /BY1S * /BY2S *  BY3S

EQUATIONS   ; These are required in Simulate Only mode because pin numbers
            ; are ignored.

Q1.CLKF = CLK
Q2.CLKF = CLK
Q3.CLKF = CLK

SIMULATION

VECTOR PSTATE := [ Q3 Q2 Q1 ]  ; Define a present state vector to be used
                               ; force the machine into a particular state.
SETF /CLK ENA BY1S /BY2S /BY3S ; Set up to count by ones
PRLDF /Q3 /Q2 /Q1              ; Start in state zero
SETF CLK                       ; Raise clock to get things going

FOR X := 1 TO 7 DO             ; Clock seven times
  BEGIN
    CLOCKF CLK
  END

SETF /BY1S BY2S                ; Set up to count by twos

FOR X := 1 TO 5 DO             ; Clock five more times
  BEGIN
    CLOCKF CLK
  END

SETF /BY2S BY3S                ; Set up to count by threes

FOR X := 1 TO 3 DO             ; Clock three more times
  BEGIN
    CLOCKF CLK
  END

SETF /ENA                      ; Pull ENA (enable) low.  Machine should wait.

FOR X := 1 TO 3 DO             ; Clock three more times
  BEGIN
    CLOCKF CLK
  END

SETF /BY3S BY1S ENA            ; Count by ones

FOR X := 1 TO 3 DO             ; Clock three more times
  BEGIN
    CLOCKF CLK
  END

SETF BY2S BY3S                 ; All BY lines high.  Machine should wait in
                               ; state S1.

FOR X := 1 TO 3 DO             ; Clock three more times
  BEGIN
    CLOCKF CLK
  END

SETF BY1S /BY2S /BY3S          ; Count by ones

FOR X := 1 TO 3 DO             ; Clock three more times
  BEGIN
    CLOCKF CLK
  END

SETF PSTATE := #B111           ; Force machine into unused state 7.  The
                               ; machine should go to S1 on the next
                               ; rising clock edge.

FOR X := 1 TO 5 DO             ; Clock five more times and call it a day
  BEGIN
    CLOCKF CLK
  END

; end of simulation