• This course requires an Altera University Program / Terasic DE10-Lite development board. This board is purchased and used in CE1901. It is also used in CE1911 and CE1921. A prototyping kit that contains a breadboard, wire, and various integrated circuit chips is also required. All students must purchase the CE1901 equipment from the EECS Tech Support Center (S-348). The cost is $102.29 and will be charged to your student account.

• DE10-Lite user manual

• Consult the instructor during office hours for clarification or help with the assigned laboratory exercises.
• Read the laboratory completely before beginning your work.
• Complete assigned prelaboratory design and simulation exercises during the week before the lab is due.
• Add appropriate VHDL source code comments if the laboratory requires VHDL descriptions.
• Simulate your solution to verify operation.
• Study the laboratory material and prepare to answer questions from the instructor during your demonstration.

• Bring your laptop and laboratory board to every lab.
• Demonstrate your working solution to the instructor when ready.
• Preview the next laboratory exercise. Prepare questions for the instructor if needed.
• Begin work on the next set of pre-laboratory exercises.

• There are usually no laboratory teams in CE1901. Most labs will be worked by each individual student.
• Feel free to consult with each other as you work on laboratory exercises but remember that you are responsible for the course material and will be quizzed by the instructor during your demonstration.

• A prime number detector using logic gates.
• A prime number detector using a with-select statement.
• A prime number detector using a when-else statement.

WEEK	MAJOR TOPIC	DUE IN LAB
1	Lecture Period	none
2	Schematic Design	Week 2
3	IC Chips	Week 3
4	Canonical Equations	Week 4
5	Design Using Multiplexers	Week 5
6	Design Using Multiplexers	Week 6
7	Signal Glitches	Week 7
8	Addition and Subtraction	Week 8
9	Carry Look Ahead Addition	Week 9
10	VHDL Description	Week 10